Design Verification Engineer

UST
UST
( )
asiaremotejobs.com  Remote (Asia | APAC Time Zone Permitted)

Job Type : Full-Time
Experience : 3 to 5 years
Education : Bachelor Degree

Job Detail

About us:

UST Global is a privately held company founded in 1999 and headquartered in the U.S. focused on providing Digital Solutions for Global 1000 clients. With more than 25,000 employees across 28 countries, we provide solutions to solve some of the toughest business problems leveraging on our specialized skills and center of excellence. Strongly anchored around a philosophy of “Transforming Lives”, UST also plays an active role in empowering under-served communities through technology solutions. In 2018, Singapore’s Temasek Holdings invested in UST Global as a strong endorsement of its capabilities, vision and market potential to lead companies through their Digital Transformation journeys.

 

To know more about us, please visit us at https://ust.com

 

We are expanding our operations in Vietnam and looking for a Design Verification Engineers.


Education Qualification:

B.E./B.Tech/Master degree in Electrical/Electronics Engineering.


Experience: 5-10 years


 What You’ll Do

As a Design Verification Engineer you will come up with test plans, and verify the design meets the highest quality standards. Develop test plans and build verification environment and report verification result to achieve expected code/functional coverage goal. A good understanding of the complete verification life cycle (test plan, test bench through coverage closure) .


• Development of UVM test benches and test cases for IPs.

• Debugging of test environment and design

• Creation of Scoreboards

• Refinement of assertions and coverage

• Advanced user of System Verilog

• Advanced user of UVM tools and methodology for IP verification.

• Experience with test development and test coverage assessment.

• Experience with setting up and running gate level simulations

• Develop and execute verification plans.

• Create and modify IP Level, SoC-level, and sub-system level test benches

• Knowledge about PHY testing like jitter, ppm, skew, low power, BIST, loopback

• Testmode testing

• Knowledge of assertion-based formal verification.

• Performance/ stress testing

• Interrupt testing 



UST is an equal opportunity employer.

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